1. Field of the Invention
This invention relates to apparatus and methods for converting light to electrical current for utility in intelligent optical relays. That is, this invention relates to apparatus and methods for detecting optical signals, processing the data with electronic circuits and emitting the processed data again as optical signals. More particularly, this invention relates to optical relay structures and processes which utilize thin membrane photodetectors formed on a silicon wafer which is cooled with microchannels.
2. Description of the Related Art
Silicon photodetectors are known in the art. Most photodetectors are P-I-N type (p-type - intrinsic - n-type silicon layers). To obtain high responsivity, the intrinsic layer of P-I-N photodetectors must be around one to three times the absorption length (for 830 nm light, the thickness would be around 10 to 30 micrometers). Such detectors have a slow response time (around 1 microsecond), unless a large voltage is applied. Furthermore, the layer structure is not compatible with that of standard electronic circuits. Metal-semiconductor-metal photodetectors on thin membranes overcome these disadvantages by being fully compatible with standard electronic circuits, simpler to fabricate, and thinner, therefore, faster. In addition, both metal contacts can be placed on the same side of the wafer. Metal-semiconductor-metal detectors are known in the art. See "Nanoscale Ultrafast Metal-Semiconductor-Metal Photoconductors," by Y. Liu et al, Proc. Device Research Conference, paper VIB-1, Cambridge, Mass., June 1992. However, use of the thin membrane as an absorbing region, surface texturing, and operation at 830 nm wavelength are not taught by this reference. The use of surface texturing traps light better, allowing a thinner membrane to be used, and thereby increasing the bandwidth of the device.
It is known in the prior art to flip chip bond vertical cavity lasers. An article describing this process is "High-power Vertical-cavity Surface Emitting Lasers," by F. H. Peters et al, Electronics Letter, Vol. 29, 1983. It is known to use microchannels to cool silicon wafers. See, for example, "High-Performance Heat Sinking for VLSI," D. B. Tuckerman et al, IEEE Electr. Dev. Lett., Vol. EDL-2, P. 126, 1981. Other types of cooling include U.S. Pat. No. 5,163,179, by Pelligrini, which discloses an IR detector capable of passive cooling because of its structure and material. Etching opens the active area of the detector, and the detector is illuminated from the back. Also, U.S. Pat. No. 4,754,139 by Ennulat et al discloses an IR detector array cooled, in part, by positioning each detector over an air filled or evacuated chamber.
Light trapping in a silicon detector by roughening the surface with sandblasting is known. For instance, see U.S. Pat. No. 3,487,223 for "Multiple Internal Reflection Structure In A Silicon Detector Which Is Obtained By Sandblasting," by A. E. St. John. Etching silicon membranes is also known in the art. "An Etch-Stop Utilizing Selective Etching of N-Type Silicon by Pulsed Potential Anodization," S. S. Wang et al, Journal of Microelectromechanical Systems, Vol. 1, pp 187-192, and "Fabrication of Novel Three-Dimensional Microstructure by the Anisotropic Etching of (100) and (110) Silicon," by E. Bassous, IEEE Transaction on Electron Devices, Vol. ED-25, pp 1178-1184, are two articles describing this process.
U.S. Pat. No. 5,223,081 by Doan discloses a method of roughening a silicon substrate comprising the steps of depositing a metal layer on the substrate, heating to form a metal silicide layer, and etching to remove the metal and metal silicide.
U.S. Pat. No. 5,162,251 by Poole et al discloses a two-step method for abrasively thinning a silicon CCD. The CCD is mounted to a glass substrate for support and to allow backside illumination.
U.S. Pat. No. 4,983,251 by Haisma et al discloses a method of manufacturing semiconductor devices comprising polishing a support body and a monocrystalline semiconductor body, providing an insulation layer, connecting the bodies, heat treating them, and etching the semiconductor body to a thin layer (to prevent circulation currents).
U.S. Pat. No. 4,160,045 by Longshore discloses a method for producing a rough photosensitive surface by depositing islands of indium on the surface and bombarding with ions.
Reactive Ion Etching (RIE) is a standard and highly reproducible dry etching process used in the silicon microfabrication industry. It creates shallow textured surfaces with high light trapping capacity by the nature of micron-sized corrugation that are formed during this process.
Back illumination of photodetectors is known in the art. U.S. Pat. No. 4,784,702 by Henri discloses a P-I-N photodiode of amorphous silicon. The P and N layers are formed by multilayers rather than doping. The diodes may be illuminated from either side. U.S. Pat. No. 3,758,797 by Peterson et al discloses a solid state bistable switching device. The silicon layer may be illuminated from the backside.